A 0.45amp;#x2013;0.7V sub-microwatt CMOS image sensor for ultra-low power applications
2009 Symposium on VLSI Circuits (2009)
- ISBN: 9781424433070
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Abstract
This work describes a low voltage CMOS image sensor with a pulsewidth modulation read-out that is optimized for ultra-low power wireless applications. A new pixel structure targeted at low voltage operation is implemented in a 128&x00D7;128 pixel test-chip in a 0.13&x00B5;m technology. Measurements show that the image sensor is functional over the range At Vdd=0.5V, the image sensor consumes 140nJ/frame at 8.5fps with a signal-to-noise ratio of 23.4dB at saturation.
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A 0.45amp;#x2013;0.7V sub-microwa...
177 2009 Symposium on VLSI Circuits Digest of Technical Papers reset ramp bl pixel_val V pixel 1. Reset photodiode voltage 2. Integrate photocurrent 3. Measure pixel voltage 4. Capture pixel value time Figure 1: System architecture Figure 2: Column architecture Figure 3: Column behavior for PWM read-out Figure 4: Pixel architecture Figure 5: Voltage transfer characteris- tics for 2T and 5T comparators Figure 6: Die photo Figure 7: Response and PRNU at Vdd=0.5V Figure 8: Signal-to-noise ratio and en- ergy consumption as functions of Vdd Figure 9: Power and energy as func- tions of frame rate at Vdd=0.5V Table 1: Comparison with previous work Table 2: Measurement summary Figure 10: Test image of a U.S. hundred dollar bill at Vdd=0.5V 1280-bit Scan Buffer Control FSM Ramp Gen Clock Gen Row Drivers Column Drivers 128 x 128 Pixel Array 128x10-bit Counter Bank control_ext ramp_ext clock_ext adc_clock Decap Row Drivers 1280 μm ... precharge_b pixel[0] pixel[127] Counter en adc_clock pixel_val[9:0] bl 0.0 0.1 0.2 0.3 0.4 0.5 0.0 0.1 0.2 0.3 0.4 0.5 V out (V) Vin (V) 2T comparator 5T comparator rwl rwl_b reset ramp Pixel Control Comparator Read Buffer bl M1 M2 M3 M4 M5 PD bl_buf Current Limiter (shared for a column) Current Limiter (shared for a column) M7 M8 M9 Image Sensor Voltage (V) Frame Rate (fps) Energy/Frame (nJ/frame) Comments [5] 1.35 9.6 5800 Rescaled for 128x128 array, includes power for whole chip [7] 1.2 20 1550 Rescaled for 128x128 array, includes power for whole chip [8] 3.3 30 480 Does not include power of decimation filter This work 0.5 8.5 140 Includes power for whole chip except scan buffer Characteristic Value Technology 0.13μm bulk Array size 128 x 128 Test-chip area 1.1mm2 Pixel size 5μm x 5μm Fill factor 32% FPN (rms) under dark conditions 6.6% of sat PRNU (rms) at saturation 4.8% of sat Temporal noise (rms) 5.4% of sat SNR at saturation at 0.5V 23.4 dB Energy/frame at 0.5V, 8.5fps 140 nJ Power at 0.5V, 8.5fps 1.2μW Power at 0.5V, 0.5fps 0.7μW 0.45 0.50 0.55 0.60 0.65 0.70 12 14 16 18 20 22 24 26 28 0 200 400 600 800 1000 1200 Energy/Frame (nJ) Signal-to-Noise Ratio (dB) Vdd (V) 0 100 200 300 400 500 600 700 0 50 100 150 200 250 0 2 4 6 8 10 PRNU (% of Saturation) Pixel Value (Digital Number) Irradiance (mW/m2) 0 2 4 6 8 10 0.7 0.8 0.9 1.0 1.1 1.2 0 200 400 600 800 1000 1200 1400 1600 Energy/Frame (nJ) Power ( P W) Frame Rate (fps) Authorized licensed use limited to: ANNA UNIVERSITY. Downloaded on August 19, 2009 at 00:50 from IEEE Xplore. Restrictions apply.
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