1-V, 1.9-GHz CDMA, CMOS on SOI, low noise amplifier

Abstract

Two-stage amplifier topology with inductive degeneration at the source was presented to meet the low noise and high frequency performance specification of the code division multiple access (CDMA) systems. The circuit simulations were carried out using Agilent's Advanced Design System (ADS) to determine the optimal gate width. It was found that the design offered high gain, low intermodulation distortion, lower noise and on-chip input output impedance matching for the system. Also the SOI devices exhibited high self-resonant frequencies, higher quality factors and high speed performances even at low supply voltages.