Correct input/output behavior of circuits in presence of internal malfunctions becomes more and more important. But reliable and efficient methods to measure this robustness are not available yet. In this paper a formal measure for the robustness of a circuit is introduced. Then, a first algorithm to determine the robustness is presented. This is done by reducing the problem either to sequential equivalence checking or to a sequence of property checking instances. The technique also identifies those parts of the circuit that are not robust from a functional point of view and therefore have to be hardened during layout. © 2008 IEEE.
CITATION STYLE
Fey, G., & Drechsler, R. (2008). A Basis for formal robustness checking. In Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008 (pp. 784–789). https://doi.org/10.1109/ISQED.2008.4479838
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