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Papers in this group

1 - 20 of 21
  1. Unit testing focuses on testing the smallest units that comprise a software system and allows developers to detect bugs early in the development process. However, unit testing is unsuitable for detecting concurrency bugs in multi-threaded programs.…
  2. Embedded hard real-time systems need reliable guarantees for the satisfaction of their timing constraints. Experience with the use of static timing-analysis methods and the tools based on them in the automotive and the aeronautics industries is…
  3. This paper suggests that input and output are basic primitives of programming and that parallel composition of communicating sequential processes is a fundamental program structuring method. When combined with a development of Dijkstra's guarded…
  4. The continuous advances in semiconductor technology enable the integration of increasing numbers of IP blocks in a single SoC. Interconnect infrastructures, such as buses, switches, and networks on chips (NoCs), combine the IPs into a working SoC.…
  5. This paper studies the problem of efficiently schedulling fully strict (i.e., well-structured) multithreaded computations on parallel computers. A popular and practical method of scheduling this kind of dynamic MIMD-style computation is “work…
  6. The growing complexity of embedded multiprocessor architectures for digital media processing will soon require highly scalable communication infrastructures. Packet switched networks-on-chip (NoC) have been proposed to support the trend for…
  7. The importance of the virtualization in embedded computing area is currently emerging. The virtualization can enhance system flexibility by enabling the concurrent execution of an application OS and a real-time OS (RTOS) on the same processor. L4…
  8. This paper is meant to be a short introduction to a new paradigm for systems on chip (SoC) design. The premises are that a component-based design methodology will prevail in the future, to support component re-use in a plug-and-play fashion. At the…
  9. As chip complexity grows, design productivity boost is expected from reuse of large parts and blocks of previous designs with the design effort largely invested into the new parts. More and more processor cores and large, reusable components are…
  10. In this paper, we present an algorithm for run-time allocation of hardware resources to software applications. We define the sub-problem of run-time spatial mapping and demonstrate our concept for streaming applications on heterogeneous MPSoCs. The…
  11. In this paper, we propose a run-time strategy for allocating the application tasks to platform resources in homogeneous networks-on-chip (NoCs). As novel contribution, we incorporate the user behavior information in the resource allocation process;…
  12. This work analyzes the impact of task migration in the context of multiprocessor systems-on-chip, where processors are interconnected by a network-on-chip (NoC) and the system must adapt itself to a dynamic workload, such that performance and…
  13. Real-time scheduling algorithms for multiprocessor systems have been the subject of considerable recent interest. For such an algorithm to be truly useful in practice, support for semaphore-based locking must be provided. However, for many global…
  14. We propose a scheduling method for real-time systems implemented on multicore platforms that encourages individual threads of multithreaded real-time tasks to be scheduled together. When such threads are cooperative and share a common working set,…
  15. During run-time varying workloads and/or constraints in embedded systems require run-time adaptivity to provide a high degree of efficiency during any operation mode/scenario. Design time decisions can often only cover certain scenarios and fail in…
  16. Systems on chip (SoC) are becoming increasingly complex, with a large number of applications integrated on the same chip. Such a system often supports a large number of use-cases and is dynamically reconfigured when platform conditions or user…
  17. Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip (SoC) communication infrastructure. Due to convergence, a growing number of applications are integrated on the same chip. When combined, these applications result…
  18. With the advent of multicore and many core architectures, we are facing a problem that is new to parallel computing, namely, the management of hierarchical parallel caches. One major limitation of all earlier models is their inability to model…