Sign up & Download
Sign in


Papers in this group tagged with "on-chip interconnect"

  1. The continuous advances in semiconductor technology enable the integration of increasing numbers of IP blocks in a single SoC. Interconnect infrastructures, such as buses, switches, and networks on chips (NoCs), combine the IPs into a working SoC.…
  2. The growing complexity of embedded multiprocessor architectures for digital media processing will soon require highly scalable communication infrastructures. Packet switched networks-on-chip (NoC) have been proposed to support the trend for…
  3. This paper is meant to be a short introduction to a new paradigm for systems on chip (SoC) design. The premises are that a component-based design methodology will prevail in the future, to support component re-use in a plug-and-play fashion. At the…
  4. As chip complexity grows, design productivity boost is expected from reuse of large parts and blocks of previous designs with the design effort largely invested into the new parts. More and more processor cores and large, reusable components are…
  5. In this paper, we present an algorithm for run-time allocation of hardware resources to software applications. We define the sub-problem of run-time spatial mapping and demonstrate our concept for streaming applications on heterogeneous MPSoCs. The…
  6. In this paper, we propose a run-time strategy for allocating the application tasks to platform resources in homogeneous networks-on-chip (NoCs). As novel contribution, we incorporate the user behavior information in the resource allocation process;…
  7. This work analyzes the impact of task migration in the context of multiprocessor systems-on-chip, where processors are interconnected by a network-on-chip (NoC) and the system must adapt itself to a dynamic workload, such that performance and…
  8. During run-time varying workloads and/or constraints in embedded systems require run-time adaptivity to provide a high degree of efficiency during any operation mode/scenario. Design time decisions can often only cover certain scenarios and fail in…
  9. Systems on chip (SoC) are becoming increasingly complex, with a large number of applications integrated on the same chip. Such a system often supports a large number of use-cases and is dynamically reconfigured when platform conditions or user…
  10. Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip (SoC) communication infrastructure. Due to convergence, a growing number of applications are integrated on the same chip. When combined, these applications result…
  11. Using on-chip interconnection networks in place of ad-hoc glo-bal wiring structures the top level wires on a chip and facilitates modular design. With this approach, system modules (processors, memories, peripherals, etc...) communicate by sending…