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Dean Truong, Ph.D., M.S., B.S.

Research Scientist , Madrigal Elektromotoren GmbH
San Francisco, California, United States

Research field: Electrical and Electronic Engineering - Circuits and Systems
Hierarchical dynamic power management techniques applied to multiple levels of system integration from the processor to cluster levels using LTI control theory and learning heuristics (e.g. fuzzy logic, neural networks, genetic algorithms, etc.).

Publications

Awards and Grants

  •  Dec 2010 
    Graduate Student Travel Award (USD$1000.00) View website
  •  Apr 2009 
    Block Grant Fellowship (USD$955.87) View website
  •  Sep 2006 
    Graduate Assistance in Areas of National Need (GAANN) Fellowship (USD$23622.16) View website
  •  Jan 2006 
    UC Microelectronics Innovation and Computer Research Opportunities (MICRO) Fellowship (USD$14359.00) View website
  •  Sep 2005 
    Block Grant Fellowship (USD$6186.50) View website

Biographical Information

Natural born U.S. Citizen finishing up a Ph.D. in Electrical and Computer Engineering focusing on the application of dynamic voltage and frequency scaling with a manycore platform architecture for biomedical signal and image processing applications.

Goals/Objective:
To be part of a state-of-the-art research/engineering group in the areas of embedded systems (e.g. real-time communications and multimedia front/back-end), high performance computing (e.g. Exascale computing), and/or biomedical signal, image, and video processing (e.g. medical ultrasound).

Primary Experience:
+ RESEARCH ASSISTANT with 16 authored and co-authored papers in top circuits journals and conferences, including IEEE Journal of Solid State Circuits, VLSI Symposium on Technology and Circuits, IEEE Transactions on Circuits and Systems, HotChips Symposia on High Performance Processors, and ACM/IEEE Design Automation Conference.
+ MANYCORE PLATFORM LEAD ARCHITECT working with a team of 10 M.S. and Ph.D. students on a 167-core globally asynchronous and locally synchronous (GALS) array consisting of 164 DSP processors, three application-specific processors (accelerators), and three 16 KB scratchpad shared memories. Design to tape-out completed in 9 months on 65 nm CMOS. The platform is capable of up to 200 GOPS at nominal Vdd, with peak energy-efficiency at 200 GOPS/W at near-threshold operation.

Specialties:
+ Variation-aware Adaptive and Dynamic Voltage and Frequency Scaling (DVFS) on Manycore Platforms
+ Digital Systems and Computer Architecture
+ RTL Engineer
+ Back-end Design and Verification
+ Digital IC Design
+ Source-synchronous Interconnects
+ Lab Instrumentation & Chip Testing
+ Embedded Software Development
+ LDPC Decoder Architectures
+ Medical Ultrasound Imaging on Massively Parallel Processor Arrays (MPPA)

CV

Professional Experience


2012 - Present
Research Scientist at Madrigal Elektromotoren GmbH
Albuquerque, New Mexico, United States
Oct 2009 - Sep 2010
President of the Electrical and Computer Engineering Graduate Student Association at University of California, Davis
Davis, California, United States
Jan 2008 - May 2010
Laboratory Manager at the VLSI Computation Laboratory at University of California, Davis
Davis, California, United States
Sep 2007 - Oct 2007
Chip Packaging and Hardware Test Engineer at University of California, Davis
Davis, California, United States
Sep 2006 - Jun 2007
Manycore (167-core) Platform Lead Architect at University of California, Davis
Davis, California, United States
Jun 2005 - Sep 2012
Research Assistant at the VLSI Computation Laboratory at University of California, Davis
Davis, California, United States
Education


Sep 2005 - May 2010
University of California, Davis in Davis, California, United States
M.S. in Electrical and Computer Engineering
Sep 2005 - Dec 2012
University of California, Davis in Davis, California, United States
Ph.D. Candidate in Electrical and Computer Engineering
Sep 2001 - Jun 2005
University of California, Davis in Davis, California, United States
B.S. in Electrical and Computer Engineering
Consulting Services

Referee Service:
+ 48th ACM/IEEE Design Automation Conference
+ 2012 and 2013 IEEE International Symposium on Circuits and Systems
+ IEEE Journal of Solid State Circuits
+ IEEE Design & Test of Computers
+ IEEE Transactions on Circuits and Systems II
+ Recent Patents on Electrical Engineering, Bentham Science Publishers

Mechatronic Senior Project Consultant, Feb. 2006 - Jun. 2006: consulted four mechanical engineering undergraduates for their senior class project, which was sponsored by Lockheed Martin.

Contact Information

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San Francisco, California, United States
Main City

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