We tested the hypothesis that single nucleotide polymorphisms (SNPs) within genes of the NF-κB pathway are associated with altered clinical outcome of septic shock patients. We genotyped 59 SNPs in the NF-κB pathway in a discovery cohort of septic…
Papers in Communication
Communication papers in Electrical and Electronic Engineering, A
Papers
1 - 20 of
3,207
in Communication, A
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Current-mode circuits are presented for implementing analog min-sum (MS) iterative decoders. These decoders are used to efficiently decode the best known error correcting codes such as low-density parity-check (LDPC) codes and turbo codes. The…
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A low-voltage (0.5 V) and low-power (4.535 mW) monolithic biomedical system-on-a-chip (SOC) consisting of a receiver, a transmitter, a microcontrol unit, and an analog-to-digital converter (ADC), implemented in a 0.18- <tex excluding the test pads.
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A high-speed analog VLSI image acquisition and pre-processing system has been designed and fabricated in a 0.35 mum standard CMOS process. The chip features a massively parallel architecture enabling the computation of programmable low-level image…
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Abstract This paper describes the implementation of a flexible Turbo and LDPC outer modem engine which is capable of supporting the WiFi(802.11n), WiMax(802.16e) and 3GPP- LTE standard on the same hardware resources. The chip is implemented in a…
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We experimentally demonstrate a 10.7-Gb/s NRZ-DPSK receiver with 4000-ps/nm chromatic dispersion tolerance by using phase demodulation with a half-bit delay in combination with a simple 4-state maximum likelihood sequence estimation (MLSE) equalizer.
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A low power audio oversampling SigmaDelta digital-to-analog converter (DAC) with a three-level (+1, 0,-1) dynamic-element-matching (DEM) technique and an inter-symbol interference-free (ISI) output stage is presented. Solutions for design challenges…
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In this brief, we present a high-speed AES IP-core, which runs at 880 MHz on a 0.13-μm CMOS standard cell library, and which achieves over 10-Gbps throughput in all encryption modes, including cipher block chaining (CBC) mode. Although the CBC…
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Optical-access networks have been developed to remove the access-network bandwidth bottleneck. However, the current solutions do not adequately address the network economics to provide a truly cost-effective solution. Long-reach optical-access…
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The stereo audio DAC with novel single-ended class-D amplifier achieving a 103-dB SNR is fully integrated in a 65nm CMOS technology. Novel asymmetric pulse-width modulation (PWM) is applied to minimize switching noise and nonlinearity in the class-D…
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Abstract We demonstrate a high-speed polarization-insensitive photoconductor based on intersecting InP nanowires synthesized between a pair of hydrogenated silicon electrodes deposited on amorphous SiO2 surfaces prepared on silicon substrates. A…
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A photonic ADC based on balanced detection, phase encoded optical sampling, wavelength multiplexing, and electronic quantization is demonstrated. It achieves 7.0 ENOB resolution at a 2GSa/s sub-sampling rate for a 40 GHz input analog signal.
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A 2304-bit flexible decoder for low-density parity-check (LDPC) codes is presented for Wireless-MAN applications. Based on modified turbo-decoding message-passing (M-TDMP) algorithm, the decoder achieves low complexity as well as fast convergence…
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This paper reports a substantially improved efficiency for a multicrystalline silicon solar cell of 19.8%. This is the highest ever reported efficiency for a multicrystalline silicon cell, The improved multicrystalline cell performance results from…
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