Papers in Communication

Communication papers in Electrical and Electronic Engineering, A

Papers 1 - 20 of 1,789 in Communication, A
1. A low-voltage (0.5 V) and low-power (4.535 mW) monolithic biomedical system-on-a-chip (SOC) consisting of a receiver, a transmitter, a microcontrol unit, and an analog-to-digital converter (ADC), implemented in a 0.18- <formula…
2. This paper presents a high-performance substrate-integrated-waveguide RF microelectromechanical systems (MEMS) tunable filter for 1.2&x2013;1.6-GHz frequency range. The proposed filter is developed using packaged RF MEMS switches and utilizes a…
3. A high speed, low noise fully differential transimpedance amplifier has been designed and implemented in 0.18 &mu;m standard digital CMOS technology. The parallel feedback circuit topology is adopted to broaden the bandwidth. This preamplifier has a…
4. A photonic ADC based on balanced detection, phase encoded optical sampling, wavelength multiplexing, and electronic quantization is demonstrated. It achieves 7.0 ENOB resolution at a 2GSa/s sub-sampling rate for a 40 GHz input analog signal.
5. This paper reports a substantially improved efficiency for a multicrystalline silicon solar cell of 19.8%. This is the highest ever reported efficiency for a multicrystalline silicon cell. The improved multicrystalline cell performance results from…
6. This letter presents the first CMOS Doherty power amplifier (PA) fully integrated on chip. The "cascode-cascade" amplifier architecture is proposed to get rid of the bulky power splitter and facilitate the integration. The quarter wavelength…
7. A 2.4-GHz energy-efficient transmitter (TX) for wireless medical applications is presented in this paper. It consists of four blocks: a phase-locked loop (PLL) synthesizer with a direct frequency presetting technique, a class-B power amplifier, a…
8. A local-oscillator phase-shifting approach is introduced to implement a fully integrated 24-GHz phased-array receiver using SiGe technology. Sixteen phases of the local oscillator are generated in one oscillator core, resulting in a raw beam-forming…
9. A 0.18&#x03BC;m CMOS MICS-band transceiver with a reconfigurable RF front-end is presented, reusing the same circuit core for super-regenerative wake-up receiver, receive-mode LNA, and transmit power amplifier, eliminating the need for an external…
10. Recent advances in the medical field are spurring the need for ultra-low power transceivers for wireless communication with medical implants. To deal with the growing demand for medical telemetry, the FCC commissioned the medical implant…
11. A lens-integrated EA/DFB laser was developed. Stable lasing operation and narrowly focused surface emission were achieved. In addition, 40-Gbit/s, 30-m error-free multimode fiber transmission was successfully demonstrated.
12. GaAs photoconductive switches have been integrated with two parallel 4-bit CMOS analog-to-digital (A/D) converter channels to demonstrate the time-interleaved sampling of wideband signals. The picosecond sampling aperture provided by…
13. A fully integrated 2GHz super-regenerative transceiver is implemented in a 0.13 μm CMOS process. The transmit and receive paths utilize BAW resonators, yielding a 450 $\mu$W 1V RF front-end and a transmitter delivering 380 $\upmu$W with 23%…
14. We present prospective functions and technologies for the commercialization of optical networks supporting nascent Ethernet rates.
15. This paper describes a multi-core processor that integrates 48 cores, 4 DDR3 memory channels, and a voltage regulator controller in a 64 2D-mesh network-on-chip architecture. Located at each mesh node is a five-port virtual cut-through…
16. In this article, we present an efficient approach for the implementation of optimum maximum likelihood decoding of QPSK modulated multiple-input-multiple-output data streams. The proposed method does not compromise optimality of the detection…
17. This paper presents a configurable MIMO detector with QR decomposition and channel interpolation for 4×4 MIMO-OFDM systems. QR decomposition (QRD) processor and MIMO detector are usually investigated independently in the literature; however, this…
18. In this paper, VLSI implementation of a configurable, soft-output MIMO detector is presented. The proposed chip can support up to 8 Ã 8 64-QAM spatial multiplexing MIMO communications, which surpasses all reported MIMO detector ICs in antenna…
19. Integration of mm-wave multiple-antenna systems on silicon-based processes enables complex, low-cost systems for high-frequency communication and sensing applications. In this paper, the transmitter and LO-path phase-shifting sections of the first…
20. This paper presents the architecture and circuit design of a single chip 32 mm<sup>2</sup> 90 nm CMOS DSP transceiver for electronic dispersion compensation (EDC) of multimode fibers at 10 Gb/s, based on maximum likelihood sequence detection (MLSD).…