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Papers in Wireless and Mobile Communication

Wireless and Mobile Communication papers in Electrical and Electronic Engineering, A

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Papers 1 - 20 of 5,703 in Wireless and Mobile Communication, A
  1. A 5 GHz MIMO direct-conversion transceiver composed of 2 transmitters (TXs) and 3 receivers (RXs) is fabricated with 0.13 mum CMOS technology. Die size is 4.56 mm times 7.7 mm. For driving 10 GHz LO signal lines of 5 mm length for both TXs and RXs,…
  2. A wide-band frequency synthesizer architecture for software defined radio applications is presented, based on a dual-VCO SigmaDelta phase locked loop (PLL), with a wide-range modulus programmable divider. The design combines high flexibility to…
  3. This paper presents a novel phased-array antenna system with multifrequency, full-duplex operation, and wide-beam scanning. The system consists of a wideband power divider, a low-loss and low-cost multiline phase shifter controlled by dual…
  4. SiN-passivated AlGaN/GaN heterojunction FETs (HJFETs) were fabricated on a thinned sapphire substrate. A 16 mm-wide HJFET on a 50 μm-thick sapphire exhibited 22.6 W (1.4 W/mm) CW power, 41.9% PAE, and 9.4 dB linear gain at 26 V drain bias. Also, a…
  5. This paper reports a 128-channel neural recording integrated circuit (IC) with on-the-fly spike feature extraction and wireless telemetry. The chip consists of eight 16-channel front-end recording blocks, spike detection and feature extraction…
  6. A 12 bit 2.9 GS/s current-steering DAC implemented in 65 nm CMOS is presented, with an IM3 < -60 dBc beyond 1 GHz while driving a 50 load with an output swing of 2.5 Vppd and dissipating a power of 188 mW. The SFDR measured at 2.9  GS/s…
  7. This paper presents a second-order Sigma-Delta modulator for electroencephalogram applications with 10 bits of resolution, 1.2 V of supply voltage, and only 140 nW of power consumption over a bandwidth of 25 Hz. Low-voltage operation has been…
  8. This paper presents the design of a Pipelined Analog-to-Digital Converter (ADC) for Electroencephalogram (EEG) applications with 10 bits of resolution, 1.2V of supply voltage and only 1.5 microW of power consumption using a standard 0.5 microm CMOS…
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