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Papers in Computational Physics

Computational Physics papers in Physics, A

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Papers 1 - 20 of 2,785 in Computational Physics, A
  1. BACKGROUND: With an influenza pandemic seemingly imminent, we constructed a model simulating the spread of influenza within the community, in order to test the impact of various interventions. METHODS: The model includes an individual level, in…
  2. This paper presents an extremely low-voltage operation and power efficient successive-approximation-register (SAR) analog-to-digital converter (ADC). Tri-level comparator is proposed to relax the speed requirement of the comparator and decrease the…
  3. A 2 GHz fractional-N digital PLL with a single delay cell, noise shaping ΔΣ TDC is implemented in a 0.13µm CMOS. With a simple structure of Δ modulator followed by a charge pump integrator, a wide range TDC input is converted to ΔΣ modulated bit…
  4. A 3×3 prototype image sensor array consisting of 2µm diameter CMOS avalanche photodiodes with 3-transistor NMOS pixel circuitry is integrated in a 90nm CMOS image sensor technology. The 5µm pixel pitch is the smallest achieved to date and is…
  5. A method is developed to take the eddy currents in lamination stacks into account with the finite-element method using the three-dimensional (3-D) magnetic vector potential magnetodynamic formulation. It consists in converting the stacked…
  6. Cosmogenic 10Be in river-borne quartz sand records a time-integrated erosion rate representative of an entire drainage basin. When sequestered in a terrace of known age, paleo-erosion rates may be recovered from the nuclide content of the terrace…
  7. A new volume tracking method is introduced for tracking interfaces in three-dimensional (3D) geometries partitioned with orthogonal hexahedra. The method approximates interface geometries as piecewise planar, and advects volumes in a single unsplit…
  8. 1Mb embedded STT-MRAM macro using 45nm CMOS process includes two key design features; a dual-voltage row decoder with a charge sharing scheme for read operations and a sensing circuit with two equalizers and read-disturbance-free reference cells.…
  9. The PCM memory chip demonstrates the key features for MLC on a relevant scale (256Mcells). Given its versatility in terms of programming pulse shape and timing, closed?loop algorithms, and the wide cell resistance range that the ADC can accommodate,…
  10. A highly linear calibration free VCO-based ADC uses a two-level modulator to eliminate distortion caused by tuning non-linearity of the VCO. The proposed architecture does not require a multi-level feedback DAC and eases anti-aliasing requirements.…
  11. We describe a neural spike-sorting processor that provides unsupervised clustering simultaneously for 16 channels. The use of a two-stage clustering algorithm, noise-tolerant distance metric, and selectively clocked high-V<inf>T</inf> register…
  12. Factors that control differentiation of presynaptic and postsynaptic elements into excitatory or inhibitory synapses are poorly defined. Here we show that the postsynaptic density (PSD) proteins PSD-95 and neuroligin-1 (NLG) are critical for…
  13. A new balanced-force algorithm is presented for modeling interfacial flow with surface tension. The algorithm is characterized by a pressure-correction method with the interfaces represented by volume fractions. Within this flow algorithm, we devise…
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