A 16-bit fixed-point digital signal processor for digital power converter control

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Abstract

This paper describes a novel and highly versatile reduced Instruction set (RISC) based fixed point digital signal processor (DSP). Its architecture, Instruction set, and integrated programmable digital pulse width modulator (DPWM) have been optimized for digitally controlled switched mode power converters (SMPCs). Designed using the Verilog hardware description language (HDL), the prototype DSP integrated circuit (IC) was built on a standard 0.35 μm digital CMOS process (with a 20 K gate count). It occupies less then 1.5 mm2 and dissipates approximately 5 mW from a 3.3 V supply at 50 MIPs. The device provides a programmable and cost effective solution for digitally controlled SMPCs. © 2005 IEEE.

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O’Malley, E., & Rinne, K. (2005). A 16-bit fixed-point digital signal processor for digital power converter control. In Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC (Vol. 1, pp. 50–56). https://doi.org/10.1109/APEC.2005.1452885

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