A 4th-order Bandpass Sigma-delta Modulator
ISCAS 98 Proceedings of the 1998 IEEE International Symposium on Circuits and Systems Cat No98CH36187 (1992)
- ISBN: 0780344553
- DOI: 10.1109/ISCAS.1998.704573
Available from ieeexplore.ieee.org
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Page 1
A 4th-order Bandpass Sigma-delta Modulator
A BANDPASS SIGMA-DELTA DEMODULATOR
Aidan Keady and Colin Lyden
National Microelectronics Research Centre,
University College, Cork,
Ireland
Abstract
A new architecture for bandpass Sigma-Delta A/D conver-
sion/demodulation with particular application in radio re-
ception is described. The proposed architecture is efficient
in terms of silicon area usage and has improved perforni-
ance over existing topologies. A chopping scheme shifts
signals from the passband to DC and a lowpass modulator
is then used to perform the conversion. In the new im-
plementation, the passband location is limited only by the
maximum sampling rate achievable rather than the lower
maximum modulator clock rate. Hence, the new converter
can digitize bands at much higher frequencies than previ-
ous implementations, while an intrinsic anti-aliasing filter
means that external anti-aliasing filter requirements are re-
laxed compared with undersampling converters. Simula-
tion results are presented showing the operation of the con-
verter with a QPSK-modulated input.
1. INTRODUCTION
Modern digital radio design concentrates on moving the di-
gital processing as close to the antenna end as possible. There-
fore, the Analogue-to-Digital interface must be placed at as
high a frequency as possible.
A block diagram of a digital radio receiver is shown in
figure 1. The bandpass Sigma-Delta converter described
here fits into the receiver at the Intermediate Frequency (IF)
stage, as shown in the dotted box in the figure. The con-
verter performs the dual riiles of mixing the signal from the
IF to the baseband and converting to digital. Subsequent
filtering and demodulation is done digitally.
Bandpass Sigma-Delta A/D converters are good candid-
ates for use in radio applications as they combine high resol-
ution conversion of a relatively narrow frequency band with
strong rejection of out-of-band signals due to the digital fil-
ter stage.
Such bandpass converters can be implemented by build-
ing a Sigma-Delta modulator with a feedback loop which
has a bandpass transfer function for the input signal and
a bandstop function for quantization noise [ I ] . In these
Antenna
Digital Out
New A/D Converter
Figure 1 : Digital Radio
0-7803-4455-3/98/$10.00 0 1998 EEE 1-57 1
converters, the passband must lie below half the modulator
clock rate and bandpass modulators must be of higher order
than lowpass modulators to achieve the same noise-shaping
order.
An alternative method introduced in [2] is to chop the in-
put signal down to DC and use a lowpass modulator. This is
efficient in terms of circuit !size but the input band is limited
to lie at quarter of the modulator clock speed.
In section 2 of this paper the new architecture for band-
pass Sigma-Delta converters is presented which combines
chopping with a multiple sampling method [3,4] which per-
mits the conversion of bands at higher frequencies than the
modulator clock speed. The downconversion and Analogue-
to-Digital conversion are carried out by the new circuit.
Section 3 presents simulated results from the new con-
verter, while section 4 suminarises the work presented.
Aidan Keady and Colin Lyden
National Microelectronics Research Centre,
University College, Cork,
Ireland
Abstract
A new architecture for bandpass Sigma-Delta A/D conver-
sion/demodulation with particular application in radio re-
ception is described. The proposed architecture is efficient
in terms of silicon area usage and has improved perforni-
ance over existing topologies. A chopping scheme shifts
signals from the passband to DC and a lowpass modulator
is then used to perform the conversion. In the new im-
plementation, the passband location is limited only by the
maximum sampling rate achievable rather than the lower
maximum modulator clock rate. Hence, the new converter
can digitize bands at much higher frequencies than previ-
ous implementations, while an intrinsic anti-aliasing filter
means that external anti-aliasing filter requirements are re-
laxed compared with undersampling converters. Simula-
tion results are presented showing the operation of the con-
verter with a QPSK-modulated input.
1. INTRODUCTION
Modern digital radio design concentrates on moving the di-
gital processing as close to the antenna end as possible. There-
fore, the Analogue-to-Digital interface must be placed at as
high a frequency as possible.
A block diagram of a digital radio receiver is shown in
figure 1. The bandpass Sigma-Delta converter described
here fits into the receiver at the Intermediate Frequency (IF)
stage, as shown in the dotted box in the figure. The con-
verter performs the dual riiles of mixing the signal from the
IF to the baseband and converting to digital. Subsequent
filtering and demodulation is done digitally.
Bandpass Sigma-Delta A/D converters are good candid-
ates for use in radio applications as they combine high resol-
ution conversion of a relatively narrow frequency band with
strong rejection of out-of-band signals due to the digital fil-
ter stage.
Such bandpass converters can be implemented by build-
ing a Sigma-Delta modulator with a feedback loop which
has a bandpass transfer function for the input signal and
a bandstop function for quantization noise [ I ] . In these
Antenna
Digital Out
New A/D Converter
Figure 1 : Digital Radio
0-7803-4455-3/98/$10.00 0 1998 EEE 1-57 1
converters, the passband must lie below half the modulator
clock rate and bandpass modulators must be of higher order
than lowpass modulators to achieve the same noise-shaping
order.
An alternative method introduced in [2] is to chop the in-
put signal down to DC and use a lowpass modulator. This is
efficient in terms of circuit !size but the input band is limited
to lie at quarter of the modulator clock speed.
In section 2 of this paper the new architecture for band-
pass Sigma-Delta converters is presented which combines
chopping with a multiple sampling method [3,4] which per-
mits the conversion of bands at higher frequencies than the
modulator clock speed. The downconversion and Analogue-
to-Digital conversion are carried out by the new circuit.
Section 3 presents simulated results from the new con-
verter, while section 4 suminarises the work presented.
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