Development Framework for Implementing
FPGA-Based Cognitive Network Nodes
Jo¨rg Lotze∗, Suhaib A. Fahmy∗, Juanjo Noguera†, Barıs¸ ¨Ozgu¨l∗, Linda Doyle∗ and Robert Esser†
∗CTVR, Trinity College Dublin, Ireland
Email: {jlotze, suhaib.fahmy, ozgulb, linda.doyle}@tcd.ie
†Xilinx Research Labs
Email: {juanjo.noguera, robert.esser}@xilinx.com
Abstract—This paper identifies important features a cognitive
radio framework should provide, namely a virtual architecture
for hardware abstraction, an adaptive run-time system for
managing cognition, and high level design tools for cognitive radio
development. We evaluate a range of existing frameworks with
respect to these, and propose a novel FPGA-based framework
that provides all these features. By abstracting away the details of
hardware reconfiguration, radio designers can implement FPGA-
based cognitive nodes much as they would do for a software
implementation.
We apply the proposed framework to the design and imple-
mentation of a receiver node that works in two modes: discovery,
where it uses spectrum sensing to find a radio transmission, and
communication, in which it receives and demodulates the said
transmission. We show how the whole design process does not
require any hardware experience on behalf of the radio designer.
I. Introduction
Autonomous, self-organising networks are built upon smart
nodes that can establish communication with peers without
the presence of a fixed network control channel [1]. For
nodes to be able to join such networks, they must be able
to not just communicate using the necessary protocols, but to
assess existing communication activity within the network. To
support these capabilities, a communications platform1 must
provide computational resources sufficient to handle signal
detection and analysis algorithms in addition to complex
modern communications protocols. We are concerned here
with detection and analysis algorithms involved in setting
up networks as exhibited in ad-hoc network and femto cell
implementations, rather than those defined in protocols. These
two phases – discovery and communication – are typically
distinct, with discovery only required on introduction to, or
change in the network.
Emerging software radio frameworks2 enable cognitive
nodes to be reconfigurable at runtime. However, most work
has focused on software running on PCs and many of the tech-
niques used do not scale down to embedded systems well, due
to high computational complexity. Signal classification and
feature extraction are even more of a challenge on embedded
platforms. Custom embedded hardware, typically using field-
programmable gate arrays (FPGAs), provide an oft-lauded
1
“platform” is used to denote physical hardware throughout this paper.
2
“framework” is used to denote the architecture and tools for design and
execution of software radios or cognitive radios.
platform for high performance embedded systems. While there
have been many examples of FPGA-based wireless systems,
the design approach has been largely ad-hoc.
FPGAs allow for the design of custom computational ar-
chitectures that can exploit parallelism in many algorithms,
resulting in a significant speedup over software implementa-
tions. One of the capabilities of FPGAs that is of particular use
in the area of cognitive nodes is partial reconfiguration. This
allows FPGA functionality to be changed at runtime, allowing
parts of the application to be replaced while other parts
continue to function. Using this capability is a complex manual
task that involves engineers who understand low-level FPGA
technology. However, it is by exploiting this capability that
high performance cognitive nodes with many configuration
options can be realised efficiently on a small device.
We believe that a practical framework for embedded cogni-
tive nodes must address three aspects:
• A virtual architecture, which can be mapped to different
boards and FPGA devices. Whatever is built on top of
this virtual architecture is independent of the underlying
FPGA device. This allows us to select the physical
platform that is most suited to the application in question.
• An adaptive runtime system that manages cognition and
reconfiguration at run-time to support custom cognitive
control while hiding low-level reconfiguration details.
• High level design tools for implementing cognitive nodes.
The key consideration is that radio designers with no
FPGA or hardware design experience should be able to
design a radio that takes advantage of the underlying
FPGA features (e.g., performance).
The framework we present here addresses these three as-
pects, greatly simplifying the design and implementation of
FPGA-based cognitive nodes. To the best of our knowledge, no
framework found in the literature addresses all these aspects.
An analysis and evaluation of a selection of existing frame-
works is given in Section II. Our proposed framework is
presented in Section III. Section IV applies this framework
to the design of a cognitive network node switching between
spectrum sensing and reception on the same hardware. Sec-
tion V draws conclusions.
This full text paper was peer reviewed at the direction of IEEE Communications Society subject matter experts for publication in the IEEE "GLOBECOM" 2009 proceedings.
978-1-4244-4148-8/09/$25.00 ©2009