On ensuring safety and liveness properties of concurrent models in systemC

Abstract

Potential for reuse and performance improvement have motivated multi-threaded, multi-core applications on current SoCs (System on a Chip). Concurrency has thus surfaced as a major challenge in SoC. Traditional design and verification approaches will not be cost-effective in exposing concurrency failures; this inability can lead to significantly increased time to market and field failures. To test for concurrency problems early on, one would have to develop abstract concurrency models and do exhaustive analysis on these models. We discuss in this paper a graduate course on concurrency modeling where we used such abstract concurrency models prior to coding. For use in software-hardware co-design, we integrated this modeling methodology with SystemC. We have documented the results with several examples. © 2005 IEEE.