Feature extraction using reconfigurable hardware

Abstract

Feature extraction is an important stage in image processing for object classification, tracking or identification. Real time processing adds stringent constraints on the efficiency of this task. The paper presents a discussion of a reconfigurable hardware processing architecture, based on components, for performing feature calculations using convolutions, morphology operators and local statistics. Special attention is directed to pipelining calculations, fast determination of minimum, median and maximum of values. The architecture is optimised for video streams, which provide the image contents using horizontal scanning. An implementation using a low cost FPGA is presented proving the feasibility of this approach. © 2010 Springer-Verlag Berlin Heidelberg.