Fault injection is frequently used for the verification and validation of the fault tolerant features of microprocessors. This paper proposes the modification of a common on-chip debugging (OCD) infrastructure to add fault injection capabilities and improve performance. The proposed solution imposes a very low logic overhead and provides a flexible and efficient mechanism for the execution of fault injection campaigns, being applicable to different target system architectures. © 2006 IEEE.
CITATION STYLE
Fidalgo, A. V., Alves, G. R., & Ferreira, J. M. (2006). A modified debugging infrastructure to assist real time fault injection campaigns. In 2006 IEEE Design and Diagnostics of Electronic Circuits and systems (Vol. 2006, pp. 172–177). https://doi.org/10.1109/DDECS.2006.1649607
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