A new approach to test pattern generation which is particularly suitable for self-test is described. Required computation time is much less than for present-day automatic test pattern generation (ATPG) programs. Fault simulation is not required. More patterns may be obtained than from standard ATPG programs. However, fault coverage is much higher - all irredundant multiple as well as single stuck faults are detected. Test length is easily controlled. The test patterns are easily generated algorithmically either by program or hardware.
CITATION STYLE
MoCluskey, E. J. (1982). Verification testing. In Proceedings - Design Automation Conference (pp. 495–500). Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/DAC.1982.1585544
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