A 65nm CMOS 4-element sub-34mW/element 60GHz phased-array transceiver

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Abstract

The 60GHz band has received significant attention as an enabler for multi-Gb/s wireless communication. Practical mm-Wave systems will require relatively large phased arrays in order to robustly overcome path-loss and fading issues. Despite significant progress [1,2], CMOS implementations of 60GHz phased arrays have so far been area and power hungry. This paper therefore presents a 60GHz 4-element 65nm CMOS phased-array transceiver consuming <34mW/element (including LO synthesis and distribution) that utilizes baseband (BB) phase shifting and holistic impedance optimization. © 2011 IEEE.

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APA

Tabesh, M., Chen, J., Marcu, C., Kong, L., Kang, S., Alon, E., & Niknejad, A. (2011). A 65nm CMOS 4-element sub-34mW/element 60GHz phased-array transceiver. In Digest of Technical Papers - IEEE International Solid-State Circuits Conference (pp. 166–167). Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/ISSCC.2011.5746266

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