An odd parity genertor design using nano-electronics

Abstract

In the growing trends of digitalized world, devices with low-power consumption has marked their importance. When we go for CMOS technology, we find many Nano-scale computing problems. In order to avoid them we go for an emerging Nano computing technology which is a Quantum -dot Cellular-automata. QCA has potential advantages like high speeds, low power dissipation and higher device densities. In this paper, a 4-bit, 8-bit, 16-bit and a 32-bit odd parity generator are proposed which are highly dense and consume low power.