Robustness analysis for value-freezing signal temporal logic

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Abstract

In our previous work we have introduced the logic STL*, an extension of Signal Temporal Logic (STL) that allows value freezing. In this paper, we define robustness measures for STL* by adapting the robustness measures previously introduced for Metric Temporal Logic (MTL). Furthermore, we present an algorithm for STL* robustness computation, which is implemented in the tool Parasim. Application of STL* robustness analysis is demonstrated on case studies.

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APA

Brim, L., Vejpustek, T., Safránek, D., & Fabriková, J. (2013). Robustness analysis for value-freezing signal temporal logic. In Electronic Proceedings in Theoretical Computer Science, EPTCS (Vol. 125, pp. 20–36). Open Publishing Association. https://doi.org/10.4204/EPTCS.125.2

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