Design And Verification of AMBA APB Protocol

Abstract

Advanced microcontroller bus architecture (AMBA) is a well established open specification for the proper management of functional blocks comprising system-on-chips (SOCs). A Memory Controller is designed to cater to this problem. This design presents an intellectual property (IP) for inter-Advanced peripheral bus (APB) protocol. The Memory Controller is a digital circu it which manages the flo w of data going to and fro m the main memo ry. It can be a separate chip or can be integrated into the system chipset. This paper revolves around building an Advanced Microcontroller Bus Architecture (AMBA) co mpliant Memory Controller as an Advanced High-performance Bus (AHB) slave. The work involved is of APB Protocol and its slave Verification. The whole design is captured using VHDL, simulated with ModelSim and configured to a FPGA target device belonging to the Virtex4 family using Xilin x.