Design Techniques for Ultra-Low Voltage Analog Circuits Using CMOS Characteristic Curves: A practical tutorial

Abstract

The use of ultra-low-voltage (ULV) analog circuits for IoT applications, in which reduced power consumption is a mandatory specification, is becoming more and more an important design approach. Also, in many IoT applications, power is supplied with energy harvested from environmental sources. It is more efficient for the circuit to operate at a voltage level close to the provided by the energy harvester (between 0.3 and 0.6 V). To deal with this when using low-cost technology process nodes 180-nm, for example, with |VT | ≈ 0.5 V it is necessary to apply specific design techniques that take advantage of reverse short channel effect, forward bulk biasing (FBB) or bulk-driven circuits. The use of low-VT transistors is also a good alternative when they are available in the target process node. This paper presents a comprehensive scenery about modern CMOS ULV design techniques from the designer’s point of view, including design trade-offs and comments about design decisions. Four step-by-step design examples of ULV circuits are presented: A cross-coupled negative transconductor, a CMOS inverter as an analog amplifier, a pseudo-differential inverter-based amplifier, and a bulk-driven differential amplifier with active load. All designs require the biasing of transistors in moderate and weak inversion regions. The goal is to demonstrate that it is possible to design ULV analog circuits using standard-VT transistors with a supply voltage much lower than the nominal VDD.