An improved genetic algorithm for 3d Ic partitioning in asic design

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Partitioning is the course of dividing a chip into sub-blocks in VLSI Physical design cycle.Partitioning in VLSI is well-thought-out to be a NP hard problem and such problems can be solved using numerous heuristics algorithm. The problems are global optimum in Very large-scale integration circuit partitioning.VLSI Partitioning theatres a foremost role in Very Large-Scale Integration physical design flow.The circuit is sliced towards sub-circuits, so called blocks.The sub-divided blocks are assigned into one layer in 3D IC partitioning.The primaryaim is to reduceinterconnectionsamong non-contiguous layers. The rapid growth in technology (3D) IC designs allowed devices tobe fabricated in smaller size. Using through-silicon via (TSVs) between adjoining dies the IC stack vertical connections are made to get 3D-ICs. In 3D IC partitioning interconnect delay is drastically limited when correlated with 2D IC partitioning by using Through Silicon Via (TSV).The article focuses on genetic algorithm with a new factor called force which is used for 3D partitioning. The proposed work is to modify genetic algorithm with probabilistic moves instead of random moves. Genetic Algorithm is one of the approaches that is used broadly.Experimental results show that the force-directed move triggers the convergence which coax the better result i.e., cost function evaluation of genetic algorithm maintaining the excellence of execution time. Force Genetic Algorithm (FGA) is effectual in 3D IC partitioning and perhapsused in further optimization problems. In MATLAB genetic algorithm (GA) gives the good result in ASIC design when compared to other methods.




Dinesh, R., & Manikandan, R. (2019). An improved genetic algorithm for 3d Ic partitioning in asic design. International Journal of Recent Technology and Engineering, 8(1), 768–770.

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