DM-IMCA: A dual-mode in-memory computing architecture for general purpose processing

Abstract

In-Memory Computing (IMC) architectures based on Static Random Access Memory (SRAM) can improve system performance and energy-efficiency dramatically. However, most of the existing SRAMbased implementations are designed for specific purposes like accelerating neural networks, which limits the application scenarios of IMC. In this paper, we propose DM-IMCA, a novel IMC architecture with two work modes for general purpose processing. It utilizes our proposed 9T bitcell based computational SRAM as the location to perform IMC operations. Besides, a new IMC Instruction Set Architecture (ISA) as well as an automated vector computing mechanism are also proposed to facilitate DM-IMCA's programming and accelerate in-memory computing, respectively. The simulation results show that DM-IMCA can bring a performance increase by up to 257x, and SRAM energy saving by up to 3x, compared to a baseline system.