Abstract
This paper describes the implementation of artificial neural networks using stochastic arithmetic capable of in situ learning. Stochastic arithmetic uses values encoded as a pulse density, and allows addition, multiplication, and the non-linearity to be implemented in a very small amount of digital hardware. A VLSI implementation of such a network is capable of processing 100 000 training vectors per second. The performance of this architecture is demonstrated by two example problems.
Cite
CITATION STYLE
Dickson, J. A., McLeod, R. D., & Card, H. C. (1993). Stochastic arithmetic implementations of neural networks with in situ learning. In IEEE International Conference on Neural Networks - Conference Proceedings (Vol. 1993-January, pp. 711–716). Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/ICNN.1993.298642
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