A horizontal-gate monolayer MoS2 transistor based on image force barrier reduction

Abstract

Transition metal dichalcogenides (TMDCs) have received wide attention as a new generation of semiconductor materials. However, there are still many problems to be solved, such as low carrier mobility, contact characteristics between metal and two-dimensional materials, and complicated fabrication processes. In order to overcome these problems, a large amount of research has been carried out so that the performance of the device has been greatly improved. However, most of these studies are based on complicated fabrication processes which are not conducive to the improvement of integration. In view of this problem, a horizontal-gate monolayer MoS2 transistor based on image force barrier reduction is proposed, in which the gate is in the same plane as the source and drain and comparable to back-gated transistors on-off ratios up to 1 × 104 have been obtained. Subsequently, by combining the Y-Function method (YFM) and the proposed diode equivalent model, it is verified that Schottky barrier height reduction is the main reason giving rise to the observed source-drain current variations. The proposed structure of the device not only provides a new idea for the high integration of two-dimensional devices, but also provides some help for the study of contact characteristics between two-dimensional materials and metals.