Performance comparison of dynamic bias comparators

Abstract

This paper encloses the performance comparison of dynamic bias based double-tail latch and Elzakker’s comparators using HEP 1 by MENTOR GRAPHICS in 130nm CMOS process. Power, delay & PDP of these comparators are compared with & without using dynamic bias that results in significant improvement of these parameters Performance comparison of these parameters utilize 500MHz frequency. Dynamic bias comparators may scale back the common energy consumption when compared to the prior comparators.