Electromigration (EM) is seen as a growing problem in recent and upcoming technology nodes, and affects a wider variety of wires (e.g., power grid, clock/signal nets), circuits (e.g., digital, analog, mixed-signal), and systems (e.g., mobile, server, automotive), touching lower levels of metal than before. Moreover, unlike traditional EM checks that were performed on each wire individually, EM checks must evolve to consider the system-level impact of wire failure. This requires a change in how interconnect design incorporates this effect. This paper overviews the root causes of EM, its impact on high-performance designs, and techniques for analyzing, working around, and alleviating the effects of EM.
CITATION STYLE
Sapatnekar, S. S. (2019). Electromigration-aware interconnect design. In Proceedings of the International Symposium on Physical Design (pp. 83–90). Association for Computing Machinery. https://doi.org/10.1145/3299902.3313156
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