A CMOS-integrated spintronic compute-in-memory macro for secure AI edge devices

Abstract

Artificial intelligence edge devices should offer high inference accuracy and rapid response times, as well as being energy efficient. Ensuring the security of these devices against malicious attacks and illegal access requires data protection mechanisms and secure access control. Here we report a spintronic non-volatile compute-in-memory macro for efficient dot-product edge computing with secure access control for activation, key and data protection against power-on and power-off probing. The approach relies on spintronic-based physically unclonable functions and two-dimensional half-complement physical encryption, as well as a snoop-proof self-decryption burst-read scheme in conjunction with a sparsity-and-rectified-linear-unit-aware early-termination compute-in-memory engine. The 6.6 megabit complementary metal–oxide–semiconductor (CMOS)-integrated macro uses 22 nm spin-transfer torque magnetic random-access memory technology. The macro achieves high randomness (inter-Hamming distance, 0.4999) and high reliability for physically unclonable functionality (intra-Hamming distance, 0), as well as a high energy efficiency for dot-product computation (between 30.1 and 68.0 tera-operations per second per watt).