Verification and Validation (V&V) systems used in automotive engineering typically face two potentially contradicting design constraints: real-time capability versus scalability. While there has been substantial research on deterministic timing behavior [1, 2], the software of such systems is usually designed statically to satisfy requirements available at design time only. If those requirements change due to new V&V applications, a complete redesign might be necessary. This paper suggests a design methodology and architecture as a step towards perfectly scalable real-time systems, i.e. systems with deterministic timing behavior and the ability to be structurally modified even at run-time, including the ability to add, re-configure, re-connect or remove existing components without affecting timing correctness of the remaining system. A component model is introduced which allows to easily extract signal dependencies of software components instantiated by the run-time system, as well as to control and manage changes in system composition automatically. As an additional benefit, modularization allows component isolation equivalent to sand boxing of modern general purpose operating systems, thus improving system robustness. We conclude with an outlook on how to extend scalability from multi-core to many-core hardware platforms.
Priller, P., Gruber, W., Olberding, N., & Peinsipp, D. (2015). Towards perfectly scalable real-time systems. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 9338, pp. 212–223). Springer Verlag. https://doi.org/10.1007/978-3-319-24249-1_19