Low power VLSI design of a modified brent kung adder based multiply accumulate unit for reverb engines

Abstract

Nowadays low power audio signal processing systems are in high demand due to its wide application in the musical industry. VLSI engineers always face many challenges in designing power efficient audio processor systems. Digital Reverb Processor is a system used to provide quality reverberation effects during stage performances. The main component used to produce the reverberation effects is a Multiply Accumulate (MAC) unit. Here the research focuses on implementing MAC unit using a modified Brent Kung Adder (BKA) that employs a 4 transistor inequality detector in the pre-processing and post-processing stages. The unit is designed using Verilog Hardware Description Language in Xilinx Vivado Design Suite 2015.2. It is synthesized for Artix-7 series Field Programmable Gate Array (FPGA). The proposed architecture has shown significant improvement in the power consumption and the figure of merit. The 16-bit design showed an improvement of 10% in the power consumption and 8.34% in the figure of merit. The applications of low power Digital Reverb Processor include Musical Instrument Amplifiers, Digital Mixers and Digital effect boxes.