A novel system-on-a-chip compatible one-transistor one-capacitor ferroelectric random-access memory array (1T1C FeRAM) based on ferroelectric Hf0.5Zr0.5O2 with a capacitor under bitline (CUB) structure was experimentally demonstrated. The CUB structure facilitates the application of post-metallization annealing on metal/ferroelectric/metal capacitors above 500 °C because they are fabricated before the back-end-of-line process. A large remanent polarization of 2Pr > 40∼μ C/cm2, projected endurance >1011 cycles, and ten years of data retention at 85 °C were obtained at 500 °C, after metallization using a single large capacitor. Furthermore, a large memory window of the 64 kbit 1T1C FeRAM array with 500 °C post-metallization was comprehensively demonstrated without degradation of the underlying CMOS logic transistors. The operation voltage and speed dependence were extensively investigated using a dedicated sense amplifier for the 1T1C FeRAM. Furthermore, the perfect bit functionality at an operation voltage of 2.5 V and a read/write speed < 10 ns were obtained. Therefore, superior properties of CUB-structured 1T1C FeRAM can be achieved by flexible process engineering of crystallization annealing for metal/ferroelectric/metal fabrication.
CITATION STYLE
Okuno, J., Kunihiro, T., Konishi, K., Materano, M., Ali, T., Kuehnel, K., … Umebayashi, T. (2022). 1T1C FeRAM Memory Array Based on Ferroelectric HZO with Capacitor under Bitline. IEEE Journal of the Electron Devices Society, 10, 29–34. https://doi.org/10.1109/JEDS.2021.3129279
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