An energy effcient reconfigurable Public-Key cryptography processor architecture

Abstract

The ever increasing demand for security in portable, energyconstrained environments that lack a coherent security architecture has resulted in the need to provide energy ecient hardware that is algorithm agile. We demonstrate the feasibility of utilizing domain-specic recon gurable processing for asymmetric cryptographic applications inorder to satisfy these constraints. An architecture is proposed that is capable of implementing a full suite of nite eld arithmetic over the integers modulo-N, binary Galois Fields, and non-supersingular elliptic curves over GF(2n), with operands ranging in size from 8 to 1024 bits. The performance and energy eciency of the architecture are estimated via simulation and compared to existing solutions (e.g., software and FPGA's), yielding approximately two orders of magnitude reduction in energy consumption at comparable levels of performance and flexibility. © Springer-Verlag Berlin Heidelberg 2000.