Memory devices obtained by Si+ irradiation through poly-Si/SiO2 gate stack

Abstract

Ion irradiation induced interface mixing was used to generate silicon nanoclusters at the SiO2-Si interface of metal-oxide-semiconductor (MOS) structures aiming at electronic memory applications. No particular processing issues have been encountered during integration of this technique in standard submicronic C-MOS technology. The memory properties of the fabricated structures as a function of the Si+-irradiation dose and post-irradiation temperature and time have been examined through electrical measurements of capacitors and transistors. Low-voltage operating devices that can endure more than 106 programming/erasing cycles have been successfully achieved. While excellent device uniformity and reproducibility have been observed over 6-inch wafers, more research is still required to improve charge retention and ensure the standard 10-year retention time needed for true non-volatile memory applications. © 2005 IOP Publishing Ltd.