Sequential logic and pipelining in chip-based electronic-photonic digital computing

Abstract

The recent rapid progress in integrated photonics has catalyzed the development of integrated optical computing in this post-Moore's law era. Electronic-photonic digital computing, as a new paradigm to achieve high-speed and power-efficient computation, has begun to attract attention. In this paper, we systematically investigate the optical sequential logic and pipelining in electronic-photonic computing, which together offer a solution to potential problems in latency and power budget as the size of electronic-photonic computing circuits scales up considerably to achieve much more complex functions. Pipelining and sequential logic open up the possibility of high-speed very-large-scale electronic-photonic digital computing.