Storage Assignment to Decrease Code Size

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Abstract

DSP architectures typically provide indirect addressing modes with auto-increment and decrement In addition, indexing mode is not available, and there are usually few; if any, general-purpose registers. Hence, it is necessary to use address registers and perform address arithmetic to access automatic variables. Subsuming the address arithmetic into auto-increment and auto-decrement modes improves the size of the generated code. In this paper we presented a formulation of the problem of optimal storage assignment such that explicit instructions for address arithmetic are minimized. We prove that for the case of a single address register the decision problem is NP-complete. We then generalize the problem to multiple address registers. For both cases heuristic algorithms are given. Our experimental results indicate an improvement of 3. © 1995, ACM. All rights reserved.

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Liao, S., Devadas, S., Keutzer, K., Tjiang, S., & Wang, A. (1995). Storage Assignment to Decrease Code Size. ACM SIGPLAN Notices, 30(6), 186–195. https://doi.org/10.1145/223428.207139

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