A 0.7-mW V-Band Transformer-Based Positive- Feedback Receiver Front-End in a 65-nm CMOS

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Abstract

In this letter, we propose an ultralow-power transformer-based V-band receiver front-end using a 65-nm CMOS technology. Forward-body-bias and transformer-based positive-feedback topologies are utilized to enable its operation at a low drain bias of 0.3 V, while still ensuring its gain performance. A resistive ring mixer, with its advantage of zero-dc-power consumption, serves as the frequency down-converter of the system. The proposed receiver front-end demonstrates an 8.5-dB conversion gain and possesses the power-saving ability to use only 0.7 mW of dc-power consumption.

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Lin, Y. H., Hsiao, S. C., Tsai, J. H., & Huang, T. W. (2020). A 0.7-mW V-Band Transformer-Based Positive- Feedback Receiver Front-End in a 65-nm CMOS. IEEE Microwave and Wireless Components Letters, 30(6), 613–616. https://doi.org/10.1109/LMWC.2020.2988350_rfseq1

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