Low Frequency Noise Reduction Using Multiple Transistors with Variable Duty Cycle Switched Biasing

Abstract

Randomization of the trap state of defects present at the gate Si-SiO2 interface of MOSFET is responsible for the low-frequency noise phenomena such as random telegraph signal (RTS) and 1/f noise. Random activity of trapping and de-trapping of mobile charge carriers, in to these defects, can be reduced by switching the device ON and OFF periodically. The analysis of the low-frequency noise considers the non-stationary behavior of traps in time-periodic biasing conditions. In this paper, analysis of the low-frequency noise by deriving a model for RTS noise power spectral density for variable duty cycle switched biasing, is presented. It is concluded that the low-frequency noise can be reduced by using a multi-stage configuration of multiple transistors in place of a single transistor. In this configuration, each transistor has a decreased duty cycle and it is shown from simulation that the noise reduction obtained can be as large as 26 dB for a 40 stage configuration.