Extending formal verification methodology toward analog circuits is a very challenging task that will occupy researchers for some time. To put this challenge in context we sketch some of the history of digital circuit verification as well as more recent attempts to adapt it to continnuous and hybrid systems. © 2006.
Maler, O. (2006). Analog Circuit Verification: a State of an Art. Electronic Notes in Theoretical Computer Science, 153(3 SPEC. ISS.), 3–7. https://doi.org/10.1016/j.entcs.2006.02.020