Abstract
Floorplan representation is a fundamental issue in designing a VLSI floorplanning algorithm as the representation has a great impact on the feasibility and complexity of floorplan designs. This survey paper gives an up-to-date account on various non-slicing floorplan representations in VLSI floorplanning. General Terms VLSI floorplanning, non-slicing floorplan, slicing floorplan.
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CITATION STYLE
APA
Jain, L., & Singh, A. (2013). Non Slicing Floorplan Representations in VLSI Floorplanning: A Summary. International Journal of Computer Applications, 71(15), 12–20. https://doi.org/10.5120/12433-8962
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