Custom High-Performance Vector Code Generation for Data-Specific Sparse Computations

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Abstract

Sparse computations, such as sparse matrix-dense vector multiplication, are notoriously hard to optimize due to their irregularity and memory-boundedness. Solutions to improve the performance of sparse computations have been proposed, ranging from hardwarebased such as gather-scatter instructions, to software ones such as generalized and dedicated sparse formats, used together with specialized executor programs for different hardware targets. These sparse computations are often performed on read-only sparse structures: while the data themselves are variable, the sparsity structure itself does not change. Indeed, sparse formats such as CSR have a typically high cost to insert/remove nonzero elements in the representation. The typical use case is to not modify the sparsity during possibly repeated computations on the same sparse structure. In this work, we exploit the possibility to generate a specialized executor program dedicated to the particular sparsity structure of an input matrix. It creates opportunities to remove indirection arrays and synthesize regular, vectorizable code for such computations. But, at the same time, it introduces challenges in code size and instruction generation, as well as efcient SIMD vectorization. We present novel techniques and extensive experimental results to efciently generate SIMD vector code for data-specifc sparse computations, and study the limits in terms of applicability and performance of our techniques compared to state-of-practice highperformance libraries like Intel MKL.

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APA

Horro, M., Pouchet, L. N., Rodríguez, G., & Touriño, J. (2022). Custom High-Performance Vector Code Generation for Data-Specific Sparse Computations. In Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT (pp. 160–171). Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1145/3559009.3569668

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