Toward on-chip network security using runtime isolation mapping

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Abstract

Many-cores execute a large number of diverse applications concurrently. Inter-Application interference can lead to a security threat as timing channel attack in the on-chip network. A non-interference communication in the shared on-chip network is a dominant necessity for secure many-core platforms to leverage the concepts of the cloud and embedded system-on-chip. The current non-interference techniques are limited to static scheduling and need router modification at micro-Architecture level. Mapping of applications can effectively determine the interference among applications in on-chip network. In this work, we explore non-interference approaches through run-Time mapping at software and application level.We map the same group of applications in isolated domain(s) to meet non-interference flows. Through run-Time mapping, we can maximize utilization of the system without leaking information. The proposed run-Time mapping policy requires no router modification in contrast to the best known competing schemes, and the performance degradation is, on average, 16% compared to the state-of-The-Art baselines.

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APA

Sadeghi, M. S., Sarmadi, S. B., & Hessabi, S. (2019). Toward on-chip network security using runtime isolation mapping. ACM Transactions on Architecture and Code Optimization, 16(3). https://doi.org/10.1145/3337770

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