Accounting for PVT Variations in design timing closure

Abstract

The On Chip Variation (OCV) refers to changes in the behavior of parameters like process, voltage and temperatures on a chip. In this paper, we go through different approaches followed to compensate for PVT variations on chip during design timing closure. We review the dominant approaches used for accounting such variations. We also review the advantages and disadvantages of these approaches used based on the ease of use, implementation, power, area, and the overheads involved in adopting them.