A Message‐Passing Hardware/Software CosimulationEnvironment for Reconfigurable Computing Systems

  • Saldaña M
  • Ramalho E
  • Chow P
N/ACitations
Citations of this article
6Readers
Mendeley users who have this article in their library.

This article is free to access.

Abstract

High‐performance reconfigurable computers (HPRCs) provide a mix of standard processors and FPGAs to collectively accelerate applications. This introduces new design challenges, such as the need for portable programming models across HPRCs and system‐level verification tools. To address the need for cosimulating a complete heterogeneous application using both software and hardware in an HPRC, we have created a tool called the Message‐passing Simulation Framework (MSF). We have used it to simulate and develop an interface enabling an MPI‐based approach to exchange data between X86 processors and hardware engines inside FPGAs. The MSF can also be used as an application development tool that enables multiple FPGAs in simulation to exchange messages amongst themselves and with X86 processors. As an example, we simulate a LINPACK benchmark hardware core using an Intel‐FSB‐Xilinx‐FPGA platform to quickly prototype the hardware, to test the communications. and to verify the benchmark results.

Cite

CITATION STYLE

APA

Saldaña, M., Ramalho, E., & Chow, P. (2009). A Message‐Passing Hardware/Software CosimulationEnvironment for Reconfigurable Computing Systems. International Journal of Reconfigurable Computing, 2009(1). https://doi.org/10.1155/2009/376232

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free