Exploration of Heterogeneous FPGA Architectures

  • Farooq U
  • Parvez H
  • Mehrez H
  • et al.
N/ACitations
Citations of this article
14Readers
Mendeley users who have this article in their library.

Abstract

Mesh-based heterogeneous FPGAs are commonly used in industry and academia due to their area, speed, and power benefits over their homogeneous counterparts. These FPGAs contain a mixture of logic blocks and hard blocks where hard blocks are arranged in fixed columns as they offer an easy and compact layout. However, the placement of hard-blocks in fixed columns can potentially lead to underutilization of logic and routing resources and this problem is further aggravated with increase in the types of hard-blocks. This work explores and compares different floor-planning techniques of mesh-based FPGA to determine their effect on the area, performance, and power of the architecture. A tree-based architecture is also presented; unlike mesh-based architecture, the floor-planning of heterogeneous tree-based architecture does not affect its routing requirements due to its hierarchical structure. Both mesh and tree-based architectures are evaluated for three sets of benchmark circuits. Experimental results show that a more flexible floor-planning in mesh-based FPGA gives better results as compared to the column-based floor-planning. Also it is shown that compared to different floor-plannings of mesh-based FPGA, tree-based architecture gives better area, performance, and power results.

Cite

CITATION STYLE

APA

Farooq, U., Parvez, H., Mehrez, H., & Marrakchi, Z. (2011). Exploration of Heterogeneous FPGA Architectures. International Journal of Reconfigurable Computing, 2011, 1–18. https://doi.org/10.1155/2011/121404

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free