FPGA implementation of a pipelined Gaussian calculation for HMM-based large vocabulary speech recognition

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Abstract

A scalable large vocabulary, speaker independent speech recognition system is being developed using Hidden Markov Models (HMMs) for acoustic modeling and a Weighted Finite State Transducer (WFST) to compile sentence, word, and phoneme models. The system comprises a software backend search and an FPGA-based Gaussian calculation which are covered here. In this paper, we present an efficient pipelined design implemented both as an embedded peripheral and as a scalable, parallel hardware accelerator. Both architectures have been implemented on an Alpha Data XRC-5T1, reconfigurable computer housing a Virtex 5 SX95T FPGA. The core has been tested and is capable of calculating a full set of Gaussian results from 3825 acoustic models in 9.03 ms which coupled with a backend search of 5000 words has provided an accuracy of over 80. Parallel implementations have been designed with up to 32 cores and have been successfully implemented with a clock frequency of 133MHz. Copyright © 2011 Richard Veitch et al.

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Veitch, R., Aubert, L. M., Woods, R., & Fischaber, S. (2011). FPGA implementation of a pipelined Gaussian calculation for HMM-based large vocabulary speech recognition. International Journal of Reconfigurable Computing, 2011. https://doi.org/10.1155/2011/697080

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