The current manufacturing systems are controlled and monitored by programmable logic controllers. The analysis and maintenance of a control program is a very complex task due to its size measured either by the number of lines of code or number of variables used. The analysis of the potential problems occurring in the controlled process, such as bottlenecks and deadlocks, requires formal tools that can produce such information. However, existing tools have important limitations. This paper proposes the use of the state diagram for such analysis. This diagram complements other formal tools such as those based on Petri nets or finite automata and allows analyzing logic control systems from the physical signals of the process. Therefore, it turns out to be a useful tool in the early stages of validation and implementation, as well as for process monitoring during the implementation phase. 2011 CEA.
Gómez, D., Baeyens, E., Cárdenasa, C., & Moyab, E. J. (2011). Supervisión de sistemas lógicos de control utilizando el diagrama de evolución del estado. RIAI - Revista Iberoamericana de Automatica e Informatica Industrial, 8(3), 196–203. https://doi.org/10.1016/j.riai.2011.06.007