Effects of varying the processing parameters on the interface-state density and retention characteristics of an MNOS capacitor

  • de Almeida A
  • Li S
  • 1

    Readers

    Mendeley users who have this article in their library.
  • 1

    Citations

    Citations of this article.

Abstract

The p+-gridded MNOS capacitor was fabricated to facilitate the study of the effects of Write/Erase cycling and of varying the processing parameters on the interface-state density in an MNOS nonvolatile memory device. A model is derived for this device, which enables the extraction of the device parameters using the quasi-static C-V (QSCV) technique. The distribution of the interface-state density across the forbidden energy gap of silicon was deduced from QSCV measurements. Interface-state density minima between 1.8 × 1011and 9.1 × 1011eV-1cm-2near the silicon midgap were obtained. The effects of processing variations on the Si/SiO2interface-state density distribution and the retention characteristics of the MNOS were studied. © 1986.

Get free article suggestions today

Mendeley saves you time finding and organizing research

Sign up here
Already have an account ?Sign in

Find this document

Authors

  • A. M. de Almeida

  • S. S. Li

Cite this document

Choose a citation style from the tabs below

Save time finding and organizing research with Mendeley

Sign up for free