Improved microcrystalline silicon and gate insulator interface with a pad/buffer structure

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Abstract

This research proposes an amorphous silicon pad layer to protect a gate insulator from being bombarded by subsequent plasma processing. This potentially improves the fabrication of inverted stagger microcrystalline silicon thin-film transistors (TFTs) at low temperatures (200 C). The pad layer can suppress the gate leakage current effectively. Further, depositing a thin microcrystalline silicon buffer layer on the pad provides seeds for crystallized silicon channel deposition. Following subsequent deposition, it was observed that the buffer layer can induce the pad layer for re-crystallization to produce a microcrystalline silicon TFT with a flat gate insulator/channel interface. Crown Copyright © 2012 Published by Elsevier B.V. All rights reserved.

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Lin, C. W., Tsai, Y. C., & Chen, Y. L. (2013). Improved microcrystalline silicon and gate insulator interface with a pad/buffer structure. In Thin Solid Films (Vol. 529, pp. 398–401). https://doi.org/10.1016/j.tsf.2012.07.074

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