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Jose Edil Medeiros

  • PhD in Eletrical Enginerring
  • Assistant Professor
  • UnB - Universidade de Brasília
  • 5PublicationsNumber of items in Jose Edil's My Publications folder on Mendeley.
  • 9Followers

Recent publications

  • A framework for assessing the use of SoC SRAMs as Physical Unclonable Functions

    • Sampaio A
    • Medeiros J
    N/AReaders
    N/ACitations
  • A fully analog low-power wavelet-based Hearing Aid Front-end

    • Medeiros J
    • Chrisostomo L
    • Meira G
    • et al.
    N/AReaders
    N/ACitations
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Professional experience

Assistant Professor

UnB - Universidade de Brasília

April 2011 - Present

Visitor Research Scholar

KTH Royal Institute of Technology

October 2016 - September 2017(a year)

Co-founder

DFchip

August 2014 - April 2017(3 years)

Co-founder

Instituto Liberal do Centro-Oeste

May 2014 - September 2016(2 years)

Technical Consultant

DFchip

November 2010 - August 2014(4 years)

Analog IC Engineer

DFchip

November 2010 - March 2011(4 months)

Engineer

Laboratório de Projeto de Circuitos Integrados, Universidade de Brasília

January 2008 - October 2010(3 years)

Education

PhD in Microelectronics

Universidade de Brasilia

July 2012 - Present

M.Sc. in Electrical Engineering

UnB - Universidade de Brasília

January 2008 - October 2010(3 years)

Electrical Engineering

UnB - Universidade de Brasília

January 2003 - July 2007(5 years)

About

José Edil Guimarães de Medeiros received his B.S. in electrical engineering from University of Brasília in 2007. He worked on the development of analog, mixed-signal and RF integrated circuits envisioned for use in wireless sensor networks and information security applications. He is currently working on the development of high-level modeling techniques for wireless sensor networks.

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