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Luis Vitorio Cargnini

  • Principal Design Engineer
  • Velodyne LiDAR Inc
  • 7h-indexImpact measure calculated using publication and citation counts. Updated daily.
  • 124CitationsNumber of citations received by Luis Vitorio's publications. Updated daily.

Recent publications

  • High performance SoC design using magnetic logic and memory

    • Zhao W
    • Torres L
    • Cargnini L
    • et al.
    N/AReaders
    13Citations
  • Design of MRAM based logic circuits and its applications

    • Zhao W
    • Torres L
    • Guillemenet Y
    • et al.
    N/AReaders
    28Citations

Professional experience

Principal Design Engineer

Velodyne LiDAR Inc

January 2020 - Present

Research Technologist Engineer

HGST

January 2014 - September 2017(4 years)

Ph.D. Candidate, Research Engineer

LIRMM

January 2010 - December 2013(4 years)

Education

Ph.D. In Microelectronics

Universite Montpellier Faculte des Sciences de Montpellier

August 2010 - December 2013(3 years)

Master in Science

PUCRS (Pontifícia Universidade Católica do Rio Grande do Sul)

August 2005 - March 2007(2 years)

Other profiles

Co-authors (20)

  • Carlos Henrique Cano
  • Raphael Brum
  • Leandro Möller
  • Sameer Varyani
  • Willyan Hasenkamp